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Numerical Computation Guide


Contents

Preface

1. Introduction

Floating-Point Environment

2. IEEE Arithmetic

IEEE Arithmetic Model
What Is IEEE Arithmetic?

IEEE Formats
Storage Formats
Single Format
Double Format
Double-Extended Format (SPARC and PowerPC)
Double-Extended Format (Intel)
Ranges and Precisions in Decimal Representation

Underflow
Underflow Thresholds
How Does IEEE Arithmetic Treat Underflow?
Why Gradual Underflow?
Error Properties of Gradual Underflow
Two Examples of Gradual Underflow Versus Store 0
Does Underflow Matter?

3. The Math Libraries

Standard Math Library

Additional Math Libraries
Sun Math Library
Optimized Libraries
Vector Math Library (SPARC only)

Single, Double, and Long Double Precision

IEEE Support Functions
ieee_functions(3m) and ieee_sun(3m)
ieee_values(3m)
ieee_flags(3m)
ieee_retrospective(3m)
nonstandard_arithmetic(3m)

Implementation Features of libm and libsunmath
About the Algorithms
Argument Reduction for Trigonometric Functions
Data Conversion Routines
Random Number Facilities

libc Support Functions
Base Conversion

4. Exceptions and Exception Handling

What Is an Exception?
Notes for Table 4-1

Detecting Exceptions
ieee_flags(3m)

Locating an Exception
Using the Debuggers to Locate an Exception
Using a Signal Handler to Locate an Exception
ieee_handler (3m)

Handling Exceptions

A. Examples

IEEE Arithmetic
Examining Stored IEEE hexadecimal Representations
The Math Libraries
Random Number Generator
ieee_values
ieee_flags -- Rounding Direction
Exceptions and Exception Handling
ieee_flags -- Accrued Exceptions
ieee_handler -- Trapping Exceptions
ieee_handler -- Abort on Exceptions
Miscellaneous
sigfpe -- Trapping Integer Exceptions
Calling FORTRAN from C
A Few Useful Debugging Commands

B. SPARC Behavior and Implementation

Floating-point Hardware
Handling Subnormal Results
Status and Control Registers
Handling Floating-point Exceptions
Handling Gradual Underflow
Nonstandard Arithmetic and Kernel Emulation (SPARC)
fpversion(1) Function -- Finding Information About the FPU
Floating-Point Hardware--Disable/Enable

C. Intel Behavior and Implementation

D. PowerPC Behavior and Implementation

Floating-Point Operations in the PowerPC Architecture
Floating-Point Status and Control Register
Floating-point Exceptions and Unimplemented Floating-Point Instructions
Gradual Underflow
Example: Using Fused Multiply-Add

E. What Every Computer Scientist Should Know About Floating Point Arithmetic

Abstract
Introduction
Rounding Error
Floating-point Formats
Relative Error and Ulps
Guard Digits
Cancellation
Exactly Rounded Operations
The IEEE Standard
Formats and Operations
Special Quantities
NaNs
Exceptions, Flags and Trap Handlers
Systems Aspects
Instruction Sets
Languages and Compilers
Exception Handling
The Details
Rounding Error
Binary to Decimal Conversion
Errors In Summation
Summary
Acknowledgments
References
Theorem 14 and Theorem 8
Theorem 14
Proof

F. Standards Compliance

SVID History
IEEE 754 History
SVID Future Directions
SVID Implementation
General Notes on Exceptional Cases and libm Functions
Notes on libm

LIA-1 Conformance

G. References

Chapter 2: "IEEE Arithmetic"
Chapter 3: "The Math Libraries"
Chapter 4: "Exceptions and Signal Handling"
Appendix B: "SPARC Behavior and Implementation"
Appendix D: "PowerPC Behavior and Implementation"
Standards
Test Programs

Glossary

Index


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